Method vsrad_n_u64

vsrad_n_u64(UInt64, UInt64, Int32)

Unsigned Shift Right and Accumulate (immediate). This instruction reads each vector element in the source SIMD&FP register, right shifts each result by an immediate value, and accumulates the final results with the vector elements of the destination SIMD&FP register. All the values in this instruction are unsigned integer values. The results are truncated. For rounded results, see URSRA.Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
Equivalent instruction: USRA Dd,Dn,#n

Declaration

public static ulong vsrad_n_u64(ulong a0, ulong a1, int a2)

Parameters

Type	Name	Description
UInt64	a0	UInt64 a0
UInt64	a1	UInt64 a1
Int32	a2	Int32 a2

Returns

Type	Description
UInt64	UInt64